I2C Controlled Single Cell 3-A Battery Charger with High Input Voltage and Power Path
SGM41511 | BQ25601
The bq25601 device is a highly-integrated 3-A switch-mode battery charge management and system power path management device for single cell Li-Ion and Li-polymer battery. The low impedance power path optimizes switch-mode operation efficiency, reduces battery charging time and extends battery life during discharging phase. The I2C serial interface with charging and system settings makes the device a truly flexible solution.
The bq25601 is a highly-integrated 3.0-A switch-mode battery charge management and system power path management device for single cell Li-Ion and Li-polymer battery. It features fast charging with high input voltage support for a wide range of smart phones, tablets and portable devices. Its low impedance power path optimizes switch-mode operation efficiency, reduces battery charging time and extends battery life during discharging phase. Its input voltage and current regulation deliver maximum charging power to battery. The solution is highly integrated with input reverse-blocking FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching FET (LSFET, Q3), and battery FET (BATFET, Q4) between system and battery. It also integrates the bootstrap diode for the high-side gate drive for simplified system design. The I2C serial interface with charging and system settings makes the device a truly flexible solution.
The device supports a wide range of input sources, including standard USB host port, USB charging port, and USB compliant high voltage adapter. The device sets default input current limit based on the built-in USB interface. To set the default input current limit, the device takes the result from detection circuit in the system, such as USB PHY device. The device is compliant with USB 2.0 and USB 3.0 power spec with input current and voltage regulation. The device also meets USB On-the-Go (OTG) operation power rating specification by supplying 5.15 V on VBUS with constant current limit up to 1.2A.
The power path management regulates the system slightly above battery voltage but does not drop below 3.5 V minimum system voltage (programmable). With this feature, the system maintains operation even when the battery is completely depleted or removed. When the input current limit or voltage limit is reached, the power path management automatically reduces the charge current to zero. As the system load continues to increase, the power path discharges the battery until the system power requirement is met. This Supplement Mode prevents overloading the input source.
The device initiates and completes a charging cycle without software control. It senses the battery voltage and charges the battery in three phases: pre-conditioning, constant current and constant voltage. At the end of the charging cycle, the charger automatically terminates when the charge current is below a preset limit and the battery voltage is higher than recharge threshold. If the fully charged battery falls below the recharge threshold, the charger automatically starts another charging cycle.
The charger provides various safety features for battery charging and system operations, including battery negative temperature coefficient thermistor monitoring, charging safety timer and overvoltage and overcurrent protections. The thermal regulation reduces charge current when the junction temperature exceeds 110°C (programmable). The STAT output reports the charging status and any fault conditions. Other safety features include battery temperature sensing for charge and boost mode, thermal regulation and thermal shutdown and input UVLO and overvoltage protection. The VBUS_GD bit indicates if a good power source is present. The INT output Immediately notifies host when fault occurs.
The device also provides QON pin for BATFET enable and reset control to exit low power ship mode or full system reset function.
The device is available in 24-pin, 4 mm × 4 mm x 0.75 mm thin WQFN package.
Chip physical measurement report, including
- The process technology,
- Die size
- The number of poly and metal layer
- High-resolution chip imaging region drawn on low resolution die photo
With high resolution chip imaging packed in BrigenOne, you can determinate the region to be analyzed the schematics inside
- If you decide to perform a circuit analysis, we will provide a complete delivery, including BrigenOne, EDIF format schematics, and PDF file
- Imaging area will be included in the deliverables, and the work scope of circuit analysis is open to discussing.
- The information we provide about this project will be quite accurate because we have completed high-resolution wafer images of each layer.
- The quotation for this project DOES NOT include high-resolution chip images packaged in BrigenOne. Please contact us to get a quote
- If you decide to perform a circuit analysis with a price exceeding US$10,000, we will provide a 25% discount on the cost of chip imaging; for circuit analysis above US$20,000, we will discount 50% of the cost of chip imaging.
