Why Choose CPS Service?

Rich circuit analysis delivery file

More than 100 circuit analysis reports a year, covering almost all technical fields, make our circuit analysis report readability well received by customers. Including RF, AD/DAC, Power Management, Memory, Serdes, we have accumulated this huge knowledge management library (KM, Knowledge Management). Through KM, the time for us to make circuit analysis reports has been greatly shortened, and our customers are able to conduct product development in the most efficient way, and products can always be listed at an alarming rate.

This is also a weapon for some customers of patent litigation. In the process of patent litigation, they can also have a clear direction to produce relevant infringement evidence to protect their rights.

We provide a search system for all publicly available circuit analysis reports, allowing you to enter keywords to find out the product design techniques you need to research.

In the future, we will also record the patent and paper database reference documents we have referenced in the circuit analysis process so that you can study the circuit theory in more depth.

Rich circuit analysis experience in different
technical fields

More than 100 circuit analysis reports a year, covering almost all technical field, make our circuit analysis report readability well received by customers. Including RF, AD/DAC, Power Management, Memory, Serdes, we have accumulated this huge knowledge management library (KM, Knowledge Management). Through KM, the time for us to make circuit analysis reports has been greatly shortened, and our customers are able to conduct product development in the most efficient way, and products can always be listed at an alarming rate.

This is also a weapon for some customers of patent litigation. In the process of patent litigation, they can also have a clear direction to produce relevant infringement evidence to protect their rights.

We provide a search system for all publicly available circuit analysis reports, allowing you to enter keywords to find out the product design techniques you need to research.

In the future, we will also record the patent and paper database reference documents we have referenced in the circuit analysis process so that you can study the circuit theory in more depth.

Advanced laboratory

After removing the package of the IC, the chip appears. Because we need high-resolution chip image capture layer by layer, we need to separate each metal layer (Poly Layer) layer by layer to prepare for chip image shooting.

 

The IC delayer is arguably the most versatile process in the lab. Generally, two methods are used. One is to use CMP solvent plus silicon carbide, put the chip in a circular disk, grind in a constant speed manner, and grind the metal layer and the void layer (Via) to reveal the next a metal layer. The other one is pickling, which is dropped onto the wafer with a chemical solvent and is ground in the above-mentioned grinding machine, and the parameters such as time and speed are arranged to achieve the purpose of layering.

 

Each of these two methods has its own advantages and disadvantages, and generally requires two kinds of use, sometimes with an ion etching machine.

 

De-layering, if it encounters an uneven surface process or 3D packaging, is often a challenge to the process of de-layering. In particular, due to the popularity of mobile devices, many ICs use Small form factor and use 3D and SIP packages. For CPS, we have overcome this problem and have successfully made up to 64 layers of 3D Flash Memory. De-layering, SIP packaging also has the experience of successfully challenging up to 10 ICs. So customers can safely hand over the commission to us.

Advanced chip image acquisition equipment and technology

After separating the layers, we need to determine the shooting magnification of each layer according to different processes, components, and the density of the lines. The optical microscope (OM, Optical Microscope) and the electron microscope (SEM, Surface Emitting Microscope) are used to take high resolution chip image. After the shooting is completed, hundreds of thousands or even millions of photos will be stitched in the same layer (Stitching) and alignment. The challenge is that the more advanced the process requires the use of a microscope with higher magnification, but the microscope with high magnification tends to be more demanding for the results of the “de-layering”. Because the line width of the advanced process is usually small, the more the particles generated during the de-layering process are unbearable, because a small particle will look quite large under a high-magnification microscope, and the direction of the line will be seriously obscured. The next circuit analysis creates uncertainty. Therefore, it is often a lot of effort and time for the rework of these processes in the laboratory.

 

CPS has completed more than 10 large-area chip of 10nm, and has officially started to take orders, and has commissioned 10nm circuit analysis.

High confidence and correct rate circuit analysis technology

The circuit analysis of the CPS begins with a high-resolution chip image that has been stitched and aligned for each layer. At this stage, we need to identify the types of components in poly and poly stain, and connect the components through the via layer traces and draw them into a netlist. At this time, the component placement position is consistent with the layout, but the architecture cannot be seen, and the function block diagram (Function Block Diagram) cannot be known. Circuit analysis engineers need to stack hierarchical structures with their circuit knowledge and wiring and represent the basic circuit units in the way of cell. Finally, the signal connection relationship between each functional block and each other is represented in a system-level manner.

 

At this stage, it is often the key to testing the circuit analysis process and personnel quality of the circuit analysis company. If you can't understand the block function, just use the serial number to link the line and the function block name. The reader needs to spend a lot of extra effort to clarify the circuit structure and principle. Sometimes even misleading readers, can not fully achieve the effect of using circuit analysis, not worth the loss

 

For circuit analysis to be fast and error-free, a large amount of circuit analysis aid software is required. Our own Brigen software has automated circuit analysis to a certain level and has helped engineers avoid many errors.

 

For readers, CPS provides BrigenOne software for customers to perform layer-by-layer browsing, related wire emphasis, bidirectional layout, and circuit components, cross-reference of cross-links, and simultaneous multi-layer chip image display.

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​Address: 

5F.-1, No.76, Sec. 2, Jiafeng S. Rd., Zhubei City, Hsinchu County 302, Taiwan

Tel / Mobile Phone: 

​886-3-5601131 / 0936326803

Email: 

​info@cps-i.com / Eliot Huo

Chip Position System Intelligence Co., Ltd All Rights Reserved 2019